This invention generally relates to integrated devices, and more specifically, to integrated devices having die, chip, or other component stacks, and to method of manufacturing such integrated devices.
As electronic devices, such as smart phones, tablets and laptop computers, get smaller, lighter and faster, they need smaller and more multifunctional semiconductor devices, components and functions. To achieve this, semiconductor devices may be provided with a stack of two or more semiconductor chips or dies mounted on a substrate and connected together using fine pitch electrical connectors such as solder bumps or balls.
Semiconductor chip stack packages present many manufacturing challenges. A current approach for fine pitch assembly uses thermal compression bonding, which requires high cost tools, and has a relatively slow volume through-put. For instance, volume through-put is on the order of four to ten seconds per stack bond, and a nine high HMC stack could take, for example, thirty-six to ninety seconds to assemble. A second problem is wafer bow or die bow/planarity and handling for thin parts.